processor bus
英 [ˈprəʊsesə(r) bʌs]
美 [ˈprɑːsesər bʌs]
网络 处理器总线; 处理机总线; 系统汇流排; 处理器汇流排
双语例句
- Information processing& Processor system bus interface ( Eurobus A)
GB/T14241-1993信息处理处理机系统总线接口（欧洲总线A） - Another alternative is to directly connect the converter to the processor's data bus.
另一种选择是直接将转换器与处理器的数据总线相连。 - Universal Radar Information Processor Based on VXS Bus
基于VXS总线的通用雷达信息处理机 - To carry out a fetch, the processor places the binary-code address of the desired location onto the address lines of the external processor bus.
为了便于获取指令，处理器把需要的由二元数据构成的地址存储在外部处理机总线的序列里面。 - In order to inspect the size and defects of elastomer workpiece in real-time, a video preprocessing IP core based on Processor Local Bus ( PLB) was proposed and implemented.
为了能够实时地检测弹性体工件的缺陷和尺寸，设计并实现了一种基于处理器局部总线（PLB）的视频预处理IP核。 - Single-chip processor shares DSP's bus and external memorizer to complete the exchange of data with DSP.
单片机与DSP共享DSP的总线和外部存储器，完成双CPU之间的数据交换。 - The Design of Parallel Processor and PC/ AT BUS Interface
并行处理器与PC/AT总线接口的设计 - For single chip processor without PC bus, it was available to use CPU's I/ O.
对于不具有I2C总线接口的单片微处理器，可利用它的I/O口来模拟实现。 - With the development of the technology of VOIP, Digital Signal Processor and PC bus interface, the IP Voice Card is getting more intelligent.
随着VOIP技术、DSP技术、PC总线接口技术的发展，基于DSP通用处理器的IP电话语音卡更加智能化。 - The Development and Application of Single Chip Processor for Monitoring Gnd to DC Bus System Earthing Measurement
单片机在直流母线系统接地检测中的应用 - This paper presents the design of Intelligent Bus Control Interface Unit ( IBCIU-B) which is intended to function as a processor/ bus interface in the Digital Avionics Information System ( DAIS).
本文提出了一个适用于数字航空电子信息系统的处理机/总线接口&智能总线控制接口单元（简称IBCIU-B）的设计方案。 - The Implementation of General Image Processor Based on Avalon Bus
基于Avalon总线的通用图像处理器的设计 - In the hardware part, according to the functionally partitioned modules, such as processor core, USB bus interface and video capture control, the concrete hardware design principles and implement methods are explained, this part emphasizes on the reliability of the module;
在硬件部分，按照处理器核心、USB总线接口和图像采集控制等几个依据功能划分的模块，说明了硬件设计原理和实现方法，重点在于硬件设计的可靠性； - A constant time sorting processor array architecture with a reconfigurable bus system
一个带有可变结构总线的常数排序处理机阵列 - This paper proposes a uniform multibus architecture, which consists of two types of nodes: the processor or computer node and the bus node.
本文提出一种面向总线的容错式多处理器或多计算机网络结构，它由处理器/计算机节点和总线节点构成。 - A multichannel data acquisition system was designed based on digital signal processor ( DSP) and universal serial bus ( USB) technology.
介绍了基于DSP芯片和USB总线技术的多通道数据采集系统的设计。 - Multi processor distributed architecture based on bus is common hardware architecture for high performance router.
基于总线的分布式多处理器体系结构是目前常见的高性能路由器硬件体系结构。 - With the card, the data could be transmitted from PC hard disk to the SAR real-time processor through PCI Bus.
该卡将PC机硬盘上数字信号通过PCI总线输出到实时成像系统中。 - A Low Power Design of DSP Processor Bus
一种降低DSP芯片总线功耗的设计方案 - And then, make analysis of system startup, processor running mode, externed BUS interface, memory configuration and management.
并分析了系统的启动过程与处理器的工作模式及功能管理、外部总线接口、存储器的分配与管理等内容； - The hardware structure was based on the multi processor system on a VME bus. Depending upon the complexity of different algorithms and the response time required by the system, a distributed control method was adopted to divide tasks and allocate hardware resources.
硬件结构以VME总线多处理器系统为基础，采用分布式控制思想，根据各种算法的复杂度和系统所要求的响应时间划分任务和分配硬件资源。 - Microcontroller Applied to the Stereo Audio Processor Based on IC Serial Bus
用单片机实现基于I~2C串行总线的音频处理系统 - As an external interface of the processor, system bus component affects the efficiency of memory system directly.
作为处理器的片外接口，系统总线部件直接影响着存储系统的效能。 - Novel Azimuth Pre-filter Design Method Using Extend-Lagrange Function for Real-time Airborne SAR Imaging System With the card, the data could be transmitted from PC hard disk to the SAR real-time processor through PCI Bus.
SAR实时成像系统中方位向滤波器设计研究该卡将PC机硬盘上数字信号通过PCI总线输出到实时成像系统中。 - Virtual database machine is a software abstract layer on general computing platforms, especially parallel computing platforms, and is made up of three components: virtual processor, virtual data bus and virtual memory.
虚拟数据库机是建立在通用硬件平台上的一个软件抽象层，由虚拟处理机、虚拟数据总线、虚拟主存三部分组成。 - Considering the needs of system integration, the flash memory controller is packaged as IP Core, which accords with the processor local bus interface standard.
考虑到系统集成的需要，将实现的闪存控制器封装成符合处理器本地总线（ProcessorLocalBus，PLB）接口标准的IP核，并根据IP核实现底层驱动程序。 - Finally, based on the selected components, this paper designed the hardware reasonably. This paper designed 6 modules for eye-mouse system. These includes a main processor module, three auxiliary processor modules, a bus module and JTAG download and debug module.
本文为眼标硬件系统设计了6个模块，即一个主处理器模块、三个辅处理器模块，一个总线模块和JTAG下载调试模块，并完成了各个模块的硬件电路的设计。 - But in contrast, bus performance increases can not satisfy the processor request, so bus become one of the bottlenecks of computer performance.
但相比之下，总线性能的增加幅度却远远不能满足处理器的要求，导致总线成为计算机性能的瓶颈之一。